After patching new ECC table, we found that "Bad block table not found for chip 0" keeps showing even if "Bad block table written to 0x07ffc000" follows every time boot up. It means that the BBT is not written correctly, in both u-boot and linux kernel.
After (painfully) tracing ECC and BBT relevant source code in u-boot, I found the root cause is the incorrect location of writing BBT/mirror patterns.
1. look at following illustration which capture from TI's wiki (http://processors.wiki.ti.com/index.php/DM365_Nand_ECC_layout)
in the file drivers/mtd/nand/nand_bbt.c, there are two nand_bbt_descr structure, bbt_main_descr and bbt_mirror_descr which contain the information how bbt is placed and searched.
originally, the structures are like below (2010-12 u-boot release, I compared with the latest one,Dec 2011, and there isn't meaningful difference regarding ECC and BBT).
===
static uint8_t bbt_pattern[] = {'B', 'b', 't', '0' };
static uint8_t mirror_pattern[] = {'1', 't', 'b', 'B' };
static struct nand_bbt_descr bbt_main_descr = {
.options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
| NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP,
.offs = 8,
.len = 4,
.veroffs = 12,
.maxblocks = 4,
.pattern = bbt_pattern
};
static struct nand_bbt_descr bbt_mirror_descr = {
.options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
| NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP,
.offs = 8,
.len = 4,
.veroffs = 12, .maxblocks = 4,
.pattern = mirror_pattern
};
===
2. in check_pattern()@nand_bbt.c, we know that the structure member
offs - the offset from start of oob of block, to place the bbt_pattern
len - the length of bbt pattern
veroffs - the offset from the start of oob of block, to place the bbt version number
Apparently the setting was wrong after deploying the new ECC layout (the upper table in the picture) because the bbt pattern, starting from the 8th byte of OOB, is conflict with ECC.
I change it to 16th and veroffs at 32th, and BBT is back again! The corresponding portion in Linux source should be changed too. In appro's ipnc release, the change can be made at ti-davinci/arch/arm/mach-davinci/board-dm368-ipnc.c
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